Abstract: This paper presents a novel digital decision feedback equalizer (DFE) design that can relax the feedback timing constraints for analog-to-digital converter (ADC)-based high-speed wireline ...
Digitally Calibrated Redundancy-Based String DAC: A Novel Architecture for Enhanced Static Linearity
Abstract: This brief introduces a three-segment resistor string ladder DAC featuring built-in redundancy and sub-radix transfer characteristics. The architecture implements digital calibration to ...
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